3rd NASCUG Meeting Agenda & Presentations

13 June 2005

Presentations from the NASCUG meeting are available for download in the table below.

2:30 - 3:00 pm Registration
3:00 - 3:05 pm Welcome and NASCUG Business
Jack Donovan, ESLX Inc.
3:05 - 3.15 pm SystemC IEEE Standardization
Victor Berman, Cadence Design Systems, Inc.
3:15 - 3:35 pm Introduction to the SystemC TLM Standard & Path to IEEE Standardization
Stuart Swan, Cadence Design Systems, Inc.
3:35 - 3:55 pm Transaction Level Modeling and Verification in SystemC
Adam Rose, Mentor Graphics, UK
3:55 - 4:15 pm Towards A Heterogeneous Simulation Kernel for System Level Models in SystemC
Hiren Patel, Sandeep Shukla, Virginia Tech.
4:15 - 4:35 pm Modeling Dynamic Reconfiguration of FPGAs with SystemC 2.1
Adam Donlin, Xilinx
4:35 - 4:55 pm Platform Aware Algorithm Design Framework
Kota Bhaskar, Element CXI
4:55 - 5:15 pm Modeling Software Interrupts using SystemC
David Black, ESLX Inc
5:15 - 5:20 pm Wrap Up and Door Prize Give Away
5:20 - 6:00 pm SystemC Networking and Beverages


Thanks to our sponsors

Actis Cadence Celoxica CoWare
Doulos Forte Design Systems Mentor Graphics Synopsys


NASCUG is managed by

Open SystemC Initiative (OSCI) Concordia University ESLX Starkey